DocumentCode :
3434724
Title :
Novel diffusion effects in a dielectrically isolated BIMOS process using SOI substrates
Author :
Yallup, Kevin ; Lane, Bill ; Edwwards, S.
Author_Institution :
Analog Devices, Limerick, Ireland
fYear :
1990
fDate :
2-4 Oct 1990
Firstpage :
130
Lastpage :
131
Abstract :
The implementaton is discussed of a bulk BIMOS process which incorporates vertical bipolar devices on a thick (5 μm) film silicon-on-insulator (SOI) substrate. When trench isolation is incorporated in such a process, fully dielectrically isolated devices can be fabricated. By appropriate application of the trench technology, no change in the electrical device parameters will be produced by such processing. It has been demonstrated that epitaxially thickened ZMR (zone-melting recrystallization) and SIMOX (separation by implantation of oxygen) substrates can support a wide range of devices such as those found in the BIMOS process. However, for device structures in which electrical parameters are sensitive to the diffusion of dopants in silicon it may be necessary to adjust the process to allow for small changes in diffusivity in SOI material. This has been demonstrated in the case of oxidation enhanced diffusion
Keywords :
BIMOS integrated circuits; integrated circuit technology; semiconductor-insulator boundaries; 5 micron; BIMOS process; SIMOX; SOI substrates; Si-SiO2; dielectrically isolated; diffusion effects; diffusivity; electrical device parameters; electrical parameters; oxidation enhanced diffusion; trench isolation; vertical bipolar devices; zone-melting recrystallization; CMOS process; Dielectric devices; Dielectric substrates; Inductors; Isolation technology; MOS devices; Silicon; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOS/SOI Technology Conference, 1990., 1990 IEEE
Conference_Location :
Key West, FL
Print_ISBN :
0-87942-573-3
Type :
conf
DOI :
10.1109/SOSSOI.1990.145745
Filename :
145745
Link To Document :
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