Reduced memory implementation of modified serial watershed algorithm based on ordered queue

The MPEG-4 standard offers guidelines to compose video objects to get complete visual scenes. In order to extract video objects from the video content of a scene, image segmentation becomes a necessary first step in the MPEG-4 video coding. The watershed transformation is one of the basic tools in mathematical morphology, which is employed in image segmentation. Direct implementation of a serial watershed algorithm based on ordered queue is very slow and consumes a lot of resources. Faster implementation of the algorithm on a chip is difficult owing to a large amount of memory required. In this paper, we propose a modified algorithm which requires fifty times less memory compared to the original watershed algorithm by ordered queue, and is also suitable for hardware implementation. Simulation results have been furnished to validate the proposed algorithm. An architecture suitable for FPGA/ASIC implementation is also proposed.