• DocumentCode
    3434766
  • Title

    Characterization of cell to cell interference in TANOS NAND flash memory

  • Author

    Byeong-In Choe ; Jong-Ho Lee

  • Author_Institution
    Sch. of Electr. Eng. & Comput. Sci. (EECS), Seoul Nat. Univ., Seoul, South Korea
  • fYear
    2012
  • fDate
    14-18 Oct. 2012
  • Firstpage
    48
  • Lastpage
    52
  • Abstract
    Cell-to-cell interference in charge trap based TANOS (Tantalum-Alumina-Nitride-Oxide-Silicon) NAND flash memory was investigated. Bit-line (B/L) interference is larger than word-line (W/L) one, which means that the channel coupling by adjacent program string to inhibit string gives larger effect than capacitive coupling to adjacent nitride storage nodes along the string. By separating the total Vth shift into each component, the channel coupling between inhibit and program strings is a main cause to make a large Vth shift. The interference between adjacent W/Ls was also observed and expected to be increased with scale-down. The read operation by applying proper read voltage on adjacent cells can alleviate the unwanted Vth shift from adjacent W/Ls to some extent.
  • Keywords
    NAND circuits; alumina; flash memories; silicon compounds; tantalum compounds; B-L interference; SiO2-SiN-Al2O3-TaN; W-L interference; adjacent nitride storage nodes; bit-line interference; capacitive coupling; cell-to-cell interference characterization; channel coupling; charge trap based TANOS NAND flash memory; tantalum-alumina-nitride-oxide-silicon NAND flash memory; word-line interference; Computer architecture; Couplings; Flash memory; Interference; Logic gates; Microprocessors; Programming;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report (IRW), 2012 IEEE International
  • Conference_Location
    South Lake Tahoe, CA
  • ISSN
    1930-8841
  • Print_ISBN
    978-1-4673-2749-7
  • Type

    conf

  • DOI
    10.1109/IIRW.2012.6468918
  • Filename
    6468918