DocumentCode :
3434886
Title :
Reduction parasitic capacitance in switching stage RF-CMOS Gilbert mixer for 2.4 GHz application
Author :
Ziabakhsh, Soheil ; Nirouei, Mahyar ; Saberkari, Alireza ; Alavi-Rad, Hosein
Author_Institution :
Dept. of Electr. Eng., Univ. of Guilan, Rasht, Iran
fYear :
2009
fDate :
13-16 Dec. 2009
Firstpage :
615
Lastpage :
618
Abstract :
This paper presents a topology for Gilbert-cell mixer that leads to a better performance in terms of noise figure, conversion gain and IIP3 at low supply voltage. In this architecture, we have used an extra LC filter for reduction parasitic capacitance noise in switching. Simulation results show the voltage CG of 17.45 dB, NF of 7.04 dB, and IIP3 of -4 dBm.
Keywords :
CMOS integrated circuits; UHF filters; UHF integrated circuits; UHF mixers; capacitance; integrated circuit noise; IIP3; LC filter; conversion gain; gain 17.45 dB; low supply voltage; noise figure; noise figure 7.04 dB; reduction parasitic capacitance noise; switching stage RF-CMOS Gilbert mixer; topology; 1f noise; Energy consumption; Filters; Impedance matching; Linearity; Low voltage; Noise reduction; Parasitic capacitance; Transconductance; Wireless sensor networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Conference_Location :
Yasmine Hammamet
Print_ISBN :
978-1-4244-5090-9
Electronic_ISBN :
978-1-4244-5091-6
Type :
conf
DOI :
10.1109/ICECS.2009.5410854
Filename :
5410854
Link To Document :
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