High Data Rate RFID Tag/Reader Architecture Using Wireless Voltage Regulation

Author

Pillin, Nicolas ; Joehl, Norbert ; Dehollain, Catherine ; Declercq, Michel J.

Author_Institution

Electron. Lab., Swiss Fed. Inst. of Technol. (EPFL), Lausanne

fYear

2008

fDate

16-17 April 2008

Firstpage

141

Lastpage

149

Abstract

This paper discusses a novel tag/reader system, based on the passive, far-field RFID principle, with megabits per second read capability at operating ranges of several centimeters. The system operates in the ISM band at 2.45 GHz. A maximum data rate of 4 Mbps was demonstrated, at a tag/reader distance of 5.5 cm. The tag is entirely realized in a standard CMOS process for minimum costs. The described system also uses wireless voltage regulation, an innovative technique that allows to improve the overall efficiency of wireless power transmission and to save power on reader side. According to the measurement results, it is shown that the efficiency was improved by a factor larger than four in the best case.

Keywords

CMOS integrated circuits; low-power electronics; radiofrequency identification; radiofrequency integrated circuits; CMOS process; ISM band; frequency 2.45 GHz; high data rate RFID tag-reader architecture; wireless power transmission; wireless voltage regulation; CMOS process; Circuits; Costs; Passive RFID tags; Power supplies; Power transmission; RFID tags; Radiofrequency identification; Rectifiers; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

RFID, 2008 IEEE International Conference on

Conference_Location

Las Vegas, NV

Print_ISBN

978-1-4244-1711-7

Electronic_ISBN

978-1-4244-1712-4

Type

conf

DOI

10.1109/RFID.2008.4519345

Filename

4519345