DocumentCode
3434904
Title
Efficient utilization of scratch-pad memory in embedded processor applications
Author
Panda, Preeti Ranjan ; Dutt, Nikil D. ; Nicolau, Alexandru
Author_Institution
Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
fYear
1997
fDate
17-20 Mar 1997
Firstpage
7
Lastpage
11
Abstract
Efficient utilization of on-chip memory space is extremely important in modern embedded system applications based on microprocessor cores. In addition to a data cache that interfaces with slower off-chip memory, a fast on-chip SRAM, called Scratch-Pad memory, is often used in several applications. We present a technique for efficiently exploiting on-chip Scratch-Pad memory by partitioning the application´s scalar and array variables into off-chip DRAM and on-chip Scratch-Pad SRAM, with the goal of minimizing the total execution time of embedded applications. Our experiments on code kernels from typical applications show that our technique results in significant performance improvements
Keywords
SRAM chips; microprocessor chips; real-time systems; storage management; SRAM; code kernel; embedded processor; execution time; microprocessor core; on-chip scratch-pad memory; partitioning; Application software; Computer science; Data buses; Embedded system; Kernel; Large scale integration; Microprocessors; Random access memory; Reduced instruction set computing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
European Design and Test Conference, 1997. ED&TC 97. Proceedings
Conference_Location
Paris
ISSN
1066-1409
Print_ISBN
0-8186-7786-4
Type
conf
DOI
10.1109/EDTC.1997.582323
Filename
582323
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