Title :
On the impact of the layout of MOSFET test-structures on NBTI-, PBTI- and HCS-lifetime due to PID
Author :
Schlunder, Christian ; Martin, Andrew
Author_Institution :
Corp. Reliability Dept., Infineon Technol. AG, Neubiberg, Germany
Abstract :
We introduce and discuss in our paper an alternative to protection diodes and compare it with different sizes and placements of diodes. In contrast to other PID publications we do not focus on the PID itself but on the impact on full transistor-lifetime estimations. We evaluate long-term NBTI, PBTI and HCS experiments.
Keywords :
MOSFET; circuit layout; negative bias temperature instability; HCS-lifetime; MOSFET test-structure layout; NBTI-lifetime; PBTI-lifetime; PID publications; full transistor-lifetime estimations; protection diodes; Antennas; Degradation; Light emitting diodes; Logic gates; Reliability; Stress; Transistors;
Conference_Titel :
Integrated Reliability Workshop Final Report (IRW), 2012 IEEE International
Conference_Location :
South Lake Tahoe, CA
Print_ISBN :
978-1-4673-2749-7
DOI :
10.1109/IIRW.2012.6468926
