Title :
A CMOS low-voltage, high-gain op-amp
Author :
Lu, G.N. ; Sou, G.
Author_Institution :
LEAM, Univ. Pierre et Marie Curie, Paris, France
Abstract :
A CMOS, self-biasing, single-supply op amp is presented. It is designed with regulated cascode transistors for gain enhancement and a common-mode feedback technique for bias stabilisation of complementary regulated cascodes. It enables supply voltage lowering to about 2|Vτ|+2|Vds,sat| with the maintain of high-gain operation. At Vdd=1.8 V, the measured DC gain of the op-amp is 115 dB, with a unity-gain frequency of 8.6 MHz for a capacitive load of 20 pF
Keywords :
CMOS analogue integrated circuits; circuit stability; differential amplifiers; feedback amplifiers; integrated circuit design; linear network synthesis; operational amplifiers; 1.8 V; 115 dB; 20 pF; 8.6 MHz; CMOS LV op-amp; bias stabilisation; common-mode feedback technique; complementary regulated cascodes; high-gain op-amp; low-voltage operation; regulated cascode transistors; self-biasing operation; single-supply op amp; supply voltage lowering; Circuits; Data conversion; Feedback; Frequency measurement; Gain measurement; Mirrors; Operational amplifiers; Telephony; Topology; Voltage;
Conference_Titel :
European Design and Test Conference, 1997. ED&TC 97. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-7786-4
DOI :
10.1109/EDTC.1997.582329
