Title :
100 nm CMOS technology. A design perspective
Author :
Veendrick, Harry
Abstract :
This article discusses the design of 100 nm CMOS integrated circuits, emphasising the implications for transistors, logic circuits, matching techniques and embedded systems. Included is a discussion of the requirements of high-speed low-power circuits, and the emerging system-on-chip technologies
Keywords :
CMOS integrated circuits; CMOS logic circuits; embedded systems; high-speed integrated circuits; integrated circuit design; low-power electronics; 100 nm; CMOS integrated circuit design; embedded systems; high-speed low-power circuits; logic circuits; matching techniques; system-on-chip technologies; transistors; CMOS technology; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2001. Tutorial Guide: ISCAS 2001. The IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-7113-5
DOI :
10.1109/TUTCAS.2001.946981
