Structurally synthesized multiple input BDDs for simulation of digital circuits

Author

Ubar, R. ; Mironov, D. ; Raik, J. ; Jutman, A.

Author_Institution

Dept. of Comput. Eng., TTU, Tallinn, Estonia

fYear

2009

fDate

13-16 Dec. 2009

Firstpage

451

Lastpage

454

Abstract

Binary decision diagrams (BDD) have become the state-of-the-art data structure in VLSI CAD for representation and manipulation of Boolean Functions. For verification, fault simulation and test generation purposes structurally synthesized BDDs (SSBDD) have proved to be better suited than traditional BDDs which represent only the function but not the structure of the circuit. In this paper we present an improvement of the SSBDD model in a form of SSBDDs with multiple inputs (SSMIBDD) which allows a significant reduction of the model complexity in the number of nodes which directly leads to decrease of the memory requirements and to increase of the speed of simulation.

Keywords

Boolean functions; VLSI; binary decision diagrams; data structures; digital circuits; electronic design automation; fault simulation; Boolean functions; CAD; VLSI; binary decision diagrams; data structure; digital circuits; fault simulation; multiple input BDD; structurally synthesized BDD; test generation; verification; Binary decision diagrams; Boolean functions; Circuit faults; Circuit simulation; Circuit synthesis; Circuit testing; Computational modeling; Data structures; Digital circuits; Logic testing; Binary Decision Diagrams; SSBDDs with multiple inputs; Structurally Synthesized BDDs; digital circuits; modeling and simulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on

Conference_Location

Yasmine Hammamet

Print_ISBN

978-1-4244-5090-9

Electronic_ISBN

978-1-4244-5091-6

Type

conf

DOI

10.1109/ICECS.2009.5410895

Filename

5410895