Title :
Effectiveness of I-V testing in comparison to IDDq tests [IC testing]
Author :
Vogels, Thomas J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fDate :
27 April-1 May 2003
Abstract :
This paper contrasts the novel I-V test criteria with traditional and recent IDDq test methods and compares their test effectiveness. It shows how I-V tests and IDDq tests fare in discriminating between "good" and "bad" dies and how test limits can be set empirically, especially for I-V testing. All results are based on data from an (internal) IBM experiment that was based on a large ASIC manufactured in a 0.18 μm-Leff technology.
Keywords :
application specific integrated circuits; electric current measurement; integrated circuit testing; 0.18 micron; ASIC; I-V testing; IC testing; IDDq test methods; empirically set test limits; good/bad die discrimination; test effectiveness; Testing; Very large scale integration;
Conference_Titel :
VLSI Test Symposium, 2003. Proceedings. 21st
Print_ISBN :
0-7695-1924-5
DOI :
10.1109/VTEST.2003.1197632
