DocumentCode
3435939
Title
Application of Saluja-Karpovsky compactors to test responses with many unknowns
Author
Patel, Janak H. ; Lumetta, Steven S. ; Reddy, Sudhakar M.
Author_Institution
Dept. of ECE, Illinois Univ., Urbana, IL, USA
fYear
2003
fDate
27 April-1 May 2003
Firstpage
107
Lastpage
112
Abstract
This paper addresses the problem of compacting test responses in the presence of unknowns at the input of the compactor by exploiting the capabilities of well-known error detection and correction codes. The technique, called i-Compact, uses Saluja-Karpovsky Space Compactors, but permits detection and location of errors in the presence of unknown logic (X) values with help from the ATE. The advantages of i-Compact are: 1. Small number of output pins front the compactors for a required error detection capability; 2. Small tester memory for storing expected responses; 3. Flexibility of choosing several different combinations of number of X values and number of bit errors for error detection without altering the hardware compactor; 4. Same hardware capable of identifying the line that produced an error in presence of unknowns; 5. Use of non-proprietary codes found in the literature of 1950s; and 6. Independent of the circuit and the test generator.
Keywords
automatic testing; design for testability; error detection; integrated circuit testing; logic testing; ATE; DFT; Saluja-Karpovsky space compactors; error detection capability; error location; i-Compact; nonproprietary codes; test response compaction; Circuit testing; Cities and towns; Compaction; Design for testability; Engineering profession; Error correction codes; Hardware; Logic testing; Pins; Shift registers;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2003. Proceedings. 21st
ISSN
1093-0167
Print_ISBN
0-7695-1924-5
Type
conf
DOI
10.1109/VTEST.2003.1197640
Filename
1197640
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