• DocumentCode
    3436292
  • Title

    Test and diagnosis of word-oriented multiport memories

  • Author

    Wang, Chih-Wea ; Cheng, Kuo-Liang ; Huang, Chih-Tsun ; Wu, Cheng-Wen

  • Author_Institution
    Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • fYear
    2003
  • fDate
    27 April-1 May 2003
  • Firstpage
    248
  • Lastpage
    253
  • Abstract
    Conventionally, the test of multiport memories is considered difficult because of the complex behavior of the faulty memories and the large number of inter-port faults. This paper presents an efficient approach for testing and diagnosing multiport RAMs. Our approach takes advantage of the higher access bandwidth due to the increased number of read/write ports, which also provides higher observability and controllability that effectively reduces the test time. Our key idea is that a sequence of March operations for any memory cell can be folded and executed within a single access cycle. We have also developed an efficient test algorithm for port-specific faults as well as traditional cell faults. The port-specific faults include the stuck-open, address decoder, and inter-port faults, for both bit-oriented and word-oriented RAMs. Experimental results for our folding scheme show that the test time reduction is about 28% for a commercial 8 KB embedded SRAM. An efficient diagnostic algorithm is also proposed for the port-specific faults and traditional cell faults.
  • Keywords
    VLSI; controllability; fault diagnosis; integrated circuit testing; integrated memory circuits; logic testing; observability; random-access storage; system-on-chip; 8 KB; March operations; address decoder faults; bit-oriented RAMs; controllability; faulty memories; folding scheme; inter-port faults; multiport RAMs; multiport memory testing; observability; port-specific faults; stuck-open faults; test algorithm; test time reduction; word-oriented RAMs; word-oriented multiport memories; Bandwidth; Circuit faults; Circuit testing; Controllability; Decoding; Laboratories; Observability; Random access memory; Read-write memory; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 2003. Proceedings. 21st
  • ISSN
    1093-0167
  • Print_ISBN
    0-7695-1924-5
  • Type

    conf

  • DOI
    10.1109/VTEST.2003.1197658
  • Filename
    1197658