DocumentCode :
3436388
Title :
Efficient cascaded VLSI FFT architecture for OFDM systems
Author :
Chouliaras, V. ; Galiatsatos, P. ; Nakos, K. ; Reisis, D. ; Vlassopoulos, N.
Author_Institution :
Dept. of Electron. & Electr. Eng., Loughborough Univ., Loughborough, UK
fYear :
2009
fDate :
13-16 Dec. 2009
Firstpage :
97
Lastpage :
100
Abstract :
This paper presents a throughput efficient cascaded FFT architecture suitable for OFDM telecommunication applications. The design exploits a technique parallelizing the radix-2 butterfly computations to increase the throughput by 2, while it keeps the complexity of the VLSI area equal to the single path delay feedback architectures. A 2048 complex point radix-2 implementation with .13 TSMC validates the results.
Keywords :
OFDM modulation; VLSI; fast Fourier transforms; feedback; OFDM systems; OFDM telecommunication; cascaded VLSI FFT architecture; fast Fourier transform; radix-2 butterfly computations; single path delay feedback architectures; Application specific integrated circuits; Computer architecture; Concurrent computing; Delay; Feedback; Hardware; OFDM; Physics; Throughput; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Conference_Location :
Yasmine Hammamet
Print_ISBN :
978-1-4244-5090-9
Electronic_ISBN :
978-1-4244-5091-6
Type :
conf
DOI :
10.1109/ICECS.2009.5410928
Filename :
5410928
Link To Document :
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