DocumentCode :
3436435
Title :
Practical concurrent ASIC and system design and verification
Author :
Gibson, Ian ; Amies, Chris
Author_Institution :
Canon Inf. Syst. Res., North Ryde, NSW, Australia
fYear :
1997
fDate :
17-20 Mar 1997
Firstpage :
532
Lastpage :
536
Abstract :
This paper describes the evolution of a design and verification methodology successfully used to develop advanced ASICs as components of multiple new commercial products. The ASICs are typically large, high speed, algorithmically complex and implement novel functionality. The ASIC development process is driven by the commercial pressures of low cost and short schedules of multiple projects. It is carried out using a team of designers of varying experience including new staff. The dual emphasis of our methodology is maintaining fine control over the design and verification process, together with full independent cross verification as an integral part of the entire ASIC and system development process
Keywords :
application specific integrated circuits; concurrent engineering; formal verification; integrated circuit design; ASIC; concurrency; design; system; verification; Amplitude shift keying; Application specific integrated circuits; Australia; Control systems; Costs; Design methodology; Digital images; Information systems; Printers; Process design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1997. ED&TC 97. Proceedings
Conference_Location :
Paris
ISSN :
1066-1409
Print_ISBN :
0-8186-7786-4
Type :
conf
DOI :
10.1109/EDTC.1997.582412
Filename :
582412
Link To Document :
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