A fast DCT processor, based on special purpose CORDIC rotators

In this paper, a new processor that computes the Discrete Cosine Transform (DCT) is presented. Based on a recently proposed DCT algorithm, this architecture overcomes the major drawbacks of the original implementation resulting in a design with considerably less area consumption and higher speed. To achieve these results, a novel architecture, based on the CORDIC circular rotation algorithm, is introduced: it reduces the required area by more than 60% compared to the use of standard CORDIC architectures. Furthermore, bit serial arithmetic is used, resulting in a very compact design. In order to get maximum throughput, the proposed processor is fully pipelined, achieving a performance efficient even for signals as fast as HDTV