Full custom chip set for high speed serial communications up to 2.48 Gbit/s

Author

Gonzàlez-Torres, J. ; Mateos, P.A. ; Hernandez, J.M.

fYear

1997

fDate

17-20 Mar 1997

Firstpage

614

Abstract

A full custom chip set has been developed (within the ESPRIT III SPIBOC project) to perform high speed serial-parallel conversion on an optical link. It is composed by two complementary circuits for 8-bit parallel to serial multiplexing and serial to parallel demultiplexing (@2.5 Gbit/s). Each integrated circuit has four identical modules in order to optimize area on board. An aggregated bit rate of 10 Gb/s is achieved. The purpose of the multiplexer chip, called HSS (High Speed Serialiser), is to adapt incoming data from external circuits to the laser driver required to transmit the information to the optical/electrical interface. In a similar way, the demultiplexer chip, called HSD (High Speed Deserialiser), takes the serial flow of transmitted data from the receiver and converts it to the primacy 8-bit-wide parallel format

Keywords

application specific integrated circuits; demultiplexing equipment; multiplexing; multiplexing equipment; optical communication equipment; 2.48 Gbit/s; 8 bit; ESPRIT III SPIBOC project; High Speed Deserialiser; High Speed Serialiser; demultiplexer chip; full custom chip set; high speed serial communications; integrated circuit; multiplexer chip; optical link; serial-parallel conversion; Bit rate; Circuits; Clocks; Demultiplexing; High speed optical techniques; Libraries; Multiplexing; Optical fiber communication; Optical receivers; Pins;

fLanguage

English

Publisher

ieee

Conference_Titel

European Design and Test Conference, 1997. ED&TC 97. Proceedings

Conference_Location

Paris

ISSN

1066-1409

Print_ISBN

0-8186-7786-4

Type

conf

DOI

10.1109/EDTC.1997.582427

Filename

582427