A double-sampling cross noise-coupled split ΣΔ-modulation A/D converter with 80 dB SNR

Author

De Bock, M. ; Rombouts, P.

Author_Institution

Dept. ELIS, Ghent Univ. (UGent), Ghent, Belgium

fYear

2009

fDate

13-16 Dec. 2009

Firstpage

45

Lastpage

48

Abstract

This paper presents the design of a double-sampling split ΣΔ-modulation analog-to-digital converter with cross noise-coupling. Double-sampling is used to achieve high conversion speed and low power consumption. To tackle the problem of quantization noise folding due to path mismatch, a fully floating bilinear integrator is used. Then the quantization noise is cross-coupled between two identical ΣΔ-modulators. This increases the effective noise shaping order of this structure with one. The final design is an optimized second order double-sampling split ΣΔ-modulator with third order noise shaping through cross noise-coupling. This design is simulated at transistor level in an 0.18-μm CMOS process for 80 dB SNR and 5 MHz bandwidth.

Keywords

CMOS integrated circuits; circuit noise; quantisation (signal); sigma-delta modulation; A/D converter; CMOS process; analog-to-digital converter; bandwidth 5 MHz; cross noise-coupling; double-sampling split ΣΔ-modulation; fully floating bilinear integrator; noise figure 80 dB; noise shaping order; path mismatch; quantization noise; size 0.18 μm; transistor level; CMOS technology; Circuit noise; Clocks; Digital filters; Energy consumption; Frequency; Noise shaping; Quantization; Sampling methods; Transfer functions; ΣΔ-modulation; 0.18 µm CMOS technology; Analog-to-digital converters; double sampling; noise-coupling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on

Conference_Location

Yasmine Hammamet

Print_ISBN

978-1-4244-5090-9

Electronic_ISBN

978-1-4244-5091-6

Type

conf

DOI

10.1109/ICECS.2009.5410953

Filename

5410953