DocumentCode :
3436953
Title :
Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters
Author :
Berg, Y.
Author_Institution :
Dept. of Inf., Univ. of Oslo, Oslo, Norway
fYear :
2009
fDate :
13-16 Dec. 2009
Firstpage :
144
Lastpage :
147
Abstract :
In this paper we present an ultra low-voltage differential transconductance amplifier. The amplifier is based on clocked semi floating-gate transistors. Rail to rail input signals may be processed and the amplifier produce a rail to rail output. Simulated data are valid for a STM 90 nm CMOS process.
Keywords :
CMOS analogue integrated circuits; differential amplifiers; invertors; low-power electronics; STM CMOS process; binary inverters; clocked semi floating-gate transistors; size 90 nm; ultra low-voltage differential transconductance amplifier; CMOS process; Clocks; Differential amplifiers; Inverters; Low voltage; Rail to rail amplifiers; Rail to rail inputs; Rail to rail outputs; Signal processing; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Conference_Location :
Yasmine Hammamet
Print_ISBN :
978-1-4244-5090-9
Electronic_ISBN :
978-1-4244-5091-6
Type :
conf
DOI :
10.1109/ICECS.2009.5410956
Filename :
5410956
Link To Document :
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