A high-speed low-power output buffer amplifier for large-size LCD applications

The present paper addresses an improved low-power high-speed buffer amplifier topology for large-size liquid crystal display applications. The proposed buffer achieves high-speed driving performance while drawing a low quiescent current during static operation. The circuit offers enhanced slewing capabilities with a limited power consumption by exploiting a slew detector which monitors the output voltage of the input differential amplifier and outputs an additional current signal providing slew-rate enhancement at the output stage. Post-layout simulations show that the proposed buffer can drive a 1-nF column line load with 8.5-V/¿s slew-rate and 0.8-¿s settling time, while drawing only 8-¿A static current from a 3-V power supply.