• DocumentCode
    3437201
  • Title

    Sorting on an array of processors

  • Author

    Jagadish, H.V.

  • Author_Institution
    AT&T Bell Labs., Murray Hill, NJ, USA
  • fYear
    1988
  • fDate
    3-5 Oct 1988
  • Firstpage
    36
  • Lastpage
    39
  • Abstract
    The author presents a practical sorting algorithm for a nearest-neighbor connected array of MIMD (multiple-instruction, multiple-data-stream) processors, each handling a significant fraction of the elements to be sorted. The algorithm is communication and CPU-optimal for a linear array, is almost order-preserving, and requires little working memory
  • Keywords
    parallel algorithms; sorting; CPU optional algorithm; communication optimal algorithm; nearest-neighbor connected array; order-preserving; sorting algorithm; Algorithm design and analysis; Centralized control; Control systems; Hardware; Nearest neighbor searches; Parallel algorithms; Sorting; System recovery;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on
  • Conference_Location
    Rye Brook, NY
  • Print_ISBN
    0-8186-0872-2
  • Type

    conf

  • DOI
    10.1109/ICCD.1988.25654
  • Filename
    25654
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3437201