Title :
Self-Aligning Return Address Stack
Author :
Wang, Guopeng ; Hu, Xiangdong ; Zhu, Ying ; Zhang, Yingnan
Author_Institution :
Nat. High Performance IC Design Centre, Shanghai, China
Abstract :
Return-Address Stack (RAS) has been widely used in modern high-performance microprocessor to predict the return address of a routine. But speculative execution frequently corrupts the RAS, making repair mechanisms necessary. In this paper, based on analysis of RAS activities after misprediction and current RAS repair mechanisms, an effective return address prediction structure called Self-Aligning Return-Address Stack (SARAS) is proposed. SARAS is composed of a classical RAS, a self-aligning queue and a top-of-stack counter. The self-aligning queue records the contents popped from RAS for recovery. The top-of-stack counter tracks the latest correct position of the top-of-stack pointer. The experiment results show that SARAS can reduces hardware-cost and enhances prediction accuracy, with a 32-entry stack, the average prediction accuracy of SARAS is nearly 100%, improving performance by 3.91% up to 11.27% over the conventional checkpointing repair mechanisms for RAS. At the same hardware budget, this speedup is even higher.
Keywords :
multiprocessing systems; RAS repair mechanism; hardware-cost reduction; modern high-performance microprocessor; return address prediction structure; self-aligning queue; self-aligning return address stack; self-aligning return-address stack; top-of-stack counter; top-of-stack pointer; Accuracy; Benchmark testing; Checkpointing; Hardware; Maintenance engineering; Power capacitors; Radiation detectors; branch prediction; return address stack; return address stack repair mechanism; self-aligning return address stack;
Conference_Titel :
Networking, Architecture and Storage (NAS), 2012 IEEE 7th International Conference on
Conference_Location :
Xiamen, Fujian
Print_ISBN :
978-1-4673-1889-1
DOI :
10.1109/NAS.2012.49