Title :
An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices
Author :
Chen, Shi-Jaw ; Lin, Tzu-Chiao ; Yang, J.-J. ; Chung, Steve S. ; Kao, T.-Y. ; Wang, Chien-Jen
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
30 March-4 April 2003
Abstract :
In. this paper, an improved gate-diode technique has been developed for the interface characterization on both n- and p-MOSFETs with gate oxide in the direct tunneling regime. This method has been demonstrated successfully for measuring oxide damage in all of the channel, space-charge (or junction), and drain extension regions in 20 Å ultra-thin gate oxide devices. As an application of the present method, the lateral profile of localized oxide damage due to Negative Bias Temperature Instability (NBTI) or Hot Carrier (HC) effect has been demonstrated. It provides us with an understanding of the correlation between the device degradation and stress-induced oxide damage in CMOS devices.
Keywords :
CMOS integrated circuits; MOSFET; hot carriers; interface states; leakage currents; semiconductor device reliability; semiconductor device testing; tunnelling; 20 A; channel region; device degradation; direct tunneling regime; drain extension region; full-range profiling; gate-diode technique; hot carrier effect; interface characterization technique; interface traps; leakage current; localized oxide damage lateral profile; n-MOSFET; negative bias temperature instability; oxide damage; p-MOSFET; space-charge region; ultra-thin gate oxide CMOS devices; CMOS technology; Current measurement; Electric variables measurement; Electronics industry; Industrial electronics; Leakage current; MOSFET circuits; Negative bias temperature instability; Niobium compounds; Tunneling;
Conference_Titel :
Reliability Physics Symposium Proceedings, 2003. 41st Annual. 2003 IEEE International
Print_ISBN :
0-7803-7649-8
DOI :
10.1109/RELPHY.2003.1197746
