DocumentCode :
3437970
Title :
Limits of backplane bus design
Author :
Borrill, P.L.
Author_Institution :
Nat. Semicond. Corp., Santa Clara, CA, USA
fYear :
1988
fDate :
3-5 Oct 1988
Firstpage :
236
Lastpage :
239
Abstract :
The author examines the fundamental design parameters of backbone interconnection including: architecture, synchronization, bus width, protocols, arbitration, and the transmission medium. The theoretical limits to the bus performance are examined along with type of system and information-flow organization that can allow effective utilization of the available bandwidth. The two technology-dependent parameters which dominate the performance of the theoretically highest performance source synchronized protocols are the manufacturing skews, and capture windows of the communicating devices. This suggests that there is considerable scope in the technology to improve the bandwidth available in backplane buses
Keywords :
computer interfaces; protocols; arbitration; backbone interconnection; backplane bus design; bus width; capture windows; design parameters; information-flow organization; manufacturing skews; protocols; synchronization; technology-dependent parameters; transmission medium; Backplanes; Bandwidth; Cache memory; Costs; Drives; Electronics industry; Hardware; Memory architecture; Protocols; Psychology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on
Conference_Location :
Rye Brook, NY
Print_ISBN :
0-8186-0872-2
Type :
conf
DOI :
10.1109/ICCD.1988.25698
Filename :
25698
Link To Document :
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