DocumentCode :
3438156
Title :
Bandwidth enhancement in 3DIC CoWoS test using direct probe technology
Author :
Hao Chen ; Jian-Ting Chen ; Shang-Ju Lee ; Ken Chou ; Cheng-Bin Chen ; Sen-Kuei Hsu ; Hung-Chih Lin ; Ching-Nen Peng ; Min-Jer Wang
Author_Institution :
Taiwan Semicond. Manuf. Co., Ltd., Hsinchu, Taiwan
fYear :
2012
fDate :
9-11 Dec. 2012
Firstpage :
9
Lastpage :
12
Abstract :
Three-dimensional integrated circuit (3DIC) technologies with the vertical stacking schemes offer the promising performances but are sensitive to the post-bond probe in the testing reliability. In order to overcome this test challenge, the direct probe interface is applied and the performances of chip are also demonstrated. By using the direct probe interface, the post-bond chips have gained with 48% bandwidth enhancement and the test cost is also reduced in the whole test flow due to the reusable characteristics.
Keywords :
integrated circuit reliability; integrated circuit testing; three-dimensional integrated circuits; 3DIC CoWoS test; bandwidth enhancement; direct probe interface technology; post-bond probe chip; test cost; testing reliability; three-dimensional integrated circuit technology; vertical stacking schemes; Bandwidth; Packaging; Probes; Semiconductor device measurement; Silicon; Substrates; Testing; Bandwidth enhancement; direct probe interface; sensitivity; three-dimensional integrated circuit;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2012 IEEE
Conference_Location :
Taipei
Print_ISBN :
978-1-4673-1444-2
Electronic_ISBN :
978-1-4673-1445-9
Type :
conf
DOI :
10.1109/EDAPS.2012.6469436
Filename :
6469436
Link To Document :
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