A modular scan-based testability system

The authors present a scan-based testability system that is an integral part of the cell-based design system at Microelectronics Center of North Carolina. The basic system consists of five modules: a scan-based audit to verify compliance with scan-based rules, a testability assessment module that projects fault coverage before any patterns are applied, a fast fault simulator that grades random and user-supplied patterns, an algorithmic test-pattern generator that produces test for faults that resist detection with random patterns or declares them redundant, and a test-pattern compactor to further reduce the size of the test-pattern set. The system serves as a platform for research into hierarchical methods, redundancy identification and removal, automated test point insertion, improved random test pattern generation, fault simulation, and boundary scan