Assessing the quality level of digital CMOS ICs under the hypothesis of nonuniform distribution of fault probabilities

An extension of the well known defect level model by Williams and Brown has been proposed, to account for non-uniform distribution of fault occurrence probabilities. The field experiment reported by Maxwell and Aitken is interpreted in terms alternative (which may also be considered complementary) to those provided by the model by Agrawal, Seth and Agrawal. Some simulation experiments show that, for circuits implemented in standard cell style, there is a correlation between occurrence probabilities and testability values of SSA and BRI faults