DocumentCode
3438664
Title
Operation serializability for embedded systems
Author
Gupta, Rajesh K.
Author_Institution
Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
fYear
1996
fDate
11-14 Mar 1996
Firstpage
108
Lastpage
114
Abstract
We consider the problem of generation of embedded software from input system descriptions in a hardware description language (HDL). Generation of software for embedded computing requires a total ordering of operations, or linearization, under constraints to ensure timely interaction with other system components. We show by example conditions where no ordering of operations in a HDL can produce the modeled functionality in software. Therefore, the existence condition for software generation or serializability must be ensured before attempting any linearization. We present the conditions based on variable definition and use analysis under which operation linearization is possible. We then present our approach to operation serialization under timing constraints to produce efficient schedules for the embedded software
Keywords
flow graphs; hardware description languages; linearisation techniques; real-time systems; software engineering; embedded systems; hardware description language; linearization; operation serializability; software functionality; software generation; timing constraints; total ordering; Concurrent computing; Embedded computing; Embedded software; Embedded system; Hardware design languages; High level synthesis; Processor scheduling; Software design; Software performance; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
European Design and Test Conference, 1996. ED&TC 96. Proceedings
Conference_Location
Paris
ISSN
1066-1409
Print_ISBN
0-8186-7424-5
Type
conf
DOI
10.1109/EDTC.1996.494134
Filename
494134
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