DocumentCode :
3438914
Title :
Achieving fault secureness in parity prediction arithmetic operators: general conditions and implementations
Author :
Nicolaidis, Michael ; Manich, S. ; Figueras, J.
Author_Institution :
Reliable Integrated Syst. Group, France
fYear :
1996
fDate :
11-14 Mar 1996
Firstpage :
186
Lastpage :
193
Abstract :
Parity prediction arithmetic operator schemes have the advantage that they are compatible with data paths and memory systems checked by parity codes. Nevertheless, the basic drawback of these schemes is that they may not be fault secure for single faults, since they propagate multiple output errors that are undetectable by the parity code. In this paper we derive necessary and sufficient conditions for parity prediction arithmetic operators to achieve the fault secure property. From these conditions, various fault secure designs for arithmetic operators are reported
Keywords :
arithmetic codes; automatic testing; fault diagnosis; logic testing; mathematical operators; parity; prediction theory; data paths; fault secureness; memory systems; parity codes; parity prediction arithmetic operators; self-checking; Adders; Circuit faults; Computer errors; Digital arithmetic; Fault tolerance; Hardware; Logic circuits; Read-write memory; Registers; Sufficient conditions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1996. ED&TC 96. Proceedings
Conference_Location :
Paris
ISSN :
1066-1409
Print_ISBN :
0-8186-7424-5
Type :
conf
DOI :
10.1109/EDTC.1996.494147
Filename :
494147
Link To Document :
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