Title :
Asynchronous SRT dividers: the real cost
Author :
Boutamine, H. ; Guyot, A. ; Elhassan, B. ; Renaudin, M.
Author_Institution :
TIMA Lab., Inst. Nat. Polytech. de Grenoble, France
Abstract :
Synchronous systems represent the majority of digital circuits built, essentially because they are easier to design and test. However, asynchronous approaches are becoming more attractive to designers because of the potential advantages brought in terms of power consumption and delay, and also favoured by the increased sophistication of today´s CAD tools. An important topic in asynchronous research is the SRT (Sweeny, Robertson, Tocher) self-timed divider. In this paper we compare two versions of a 32-bit SRT divider, synchronous and asynchronous. Our results show that the asynchronous circuit is faster, but consumes more power over an increased area
Keywords :
asynchronous circuits; digital arithmetic; dividing circuits; timing; 32 bit; asynchronous SRT dividers; asynchronous circuit; self-timed divider; Asynchronous circuits; Circuit testing; Clocks; Costs; Delay; Design automation; Digital circuits; Energy consumption; Microprocessors; System performance;
Conference_Titel :
European Design and Test Conference, 1996. ED&TC 96. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-7424-5
DOI :
10.1109/EDTC.1996.494148