DocumentCode :
3439104
Title :
TDDB and voltage-ramp reliability of SiC-base dielectric diffusion barriers in Cu/low-k interconnects
Author :
Jow, K. ; Alers, G.B. ; Sanganeria, M. ; Harm, G. ; Fu, H. ; Tang, X. ; Kooi, G. ; Ray, G.W. ; Danek, M.
Author_Institution :
Novellus Syst., San Jose, CA, USA
fYear :
2003
fDate :
30 March-4 April 2003
Firstpage :
598
Lastpage :
599
Abstract :
Failure modes for inter-level dielectric layers under accelerated test conditions are evaluated for copper/low-k interconnects. The dominant failure mode under high voltage stress conditions appears to be mechanical cracking at the dielectric barrier/low-k interface. A simple model for the electrostatic force between interdigitated lines is able to account for the failure with certain assumptions about interfacial adhesion strength of the dielectric diffusion barrier.
Keywords :
adhesion; copper; dielectric thin films; diffusion barriers; electric breakdown; electromigration; failure analysis; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; life testing; silicon compounds; Cu; Cu/low-k interconnects; SiC; SiC-base dielectric diffusion barriers; TDDB; accelerated test conditions; dielectric barrier/low-k interface; dominant failure mode; electrostatic force model; failure modes; high voltage stress conditions; inter-level dielectric layers; interdigitated lines; interfacial adhesion strength; mechanical cracking; voltage-ramp reliability; Adhesives; Breakdown voltage; Copper; Dielectric breakdown; Electric breakdown; Electrostatics; Leakage current; Life estimation; Stress; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium Proceedings, 2003. 41st Annual. 2003 IEEE International
Print_ISBN :
0-7803-7649-8
Type :
conf
DOI :
10.1109/RELPHY.2003.1197824
Filename :
1197824
Link To Document :
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