Title :
The design of a systolic architecture to implement graphic transformations
Author :
Papadourakis, George M. ; Bebis, George N.
Author_Institution :
Dept. of Comput. Sci., Crete Univ., Iraklion, Greece
Abstract :
A new systolic graphic array architecture is proposed in order to achieve the high computational throughput necessary to generate real-time processing. The proposed systolic architecture implements graphic transformations such as translations, scaling, and rotations on three dimensional vertices. The logarithmic number system is utilized to further increase the computational throughput. A comparison between the proposed systolic architecture and the Weitek 7100 SME graphic processor in terms of speed is performed
Keywords :
computer graphic equipment; parallel architectures; performance evaluation; real-time systems; systolic arrays; 3D graphics; Weitek 7100 SME graphic processor; computational throughput; graphic array architecture; graphic transformations; logarithmic number system; processor speed; real-time processing; rotations; scaling; systolic architecture; translations; Computational modeling; Computer architecture; Computer graphics; Computer science; Displays; Image generation; Signal processing algorithms; Systolic arrays; Throughput; Very large scale integration;
Conference_Titel :
CompEuro '91. Advanced Computer Technology, Reliable Systems and Applications. 5th Annual European Computer Conference. Proceedings.
Conference_Location :
Bologna
Print_ISBN :
0-8186-2141-9
DOI :
10.1109/CMPEUR.1991.257376
