DocumentCode :
3439269
Title :
Vertical MOSFETs for High Performance, Low Cost CMOS
Author :
Hall, S. ; Tan, L. ; Buiu, O. ; Hakim, M.M. ; Uchino, T. ; Ashburn, P. ; Redman-White, W.
Author_Institution :
Dept. of Electr. Eng. & Electron., Liverpool Univ., Liverpool
Volume :
2
fYear :
2007
fDate :
Oct. 15 2007-Sept. 17 2007
Firstpage :
387
Lastpage :
396
Abstract :
We present a review of recent reports on vertical MOSFETs which includes a summary of our own research in this area. Such devices can offer a decananometer channel length in a relaxed lithography. Furthermore, the footprint is substantially smaller than an equivalent lateral MOSFET for a given on-current. We summarise a number of innovative device architectures that allow control of short channel effects and reduction of parasitic elements. Both numerical modelling and experimental results are presented to validate the proposals. The devices are particularly suited to radio frequency application.
Keywords :
CMOS integrated circuits; MOSFET; CMOS; channel effects; decananometer channel length; numerical modelling; parasitic elements; vertical MOSFET; CMOS process; CMOS technology; Computer science; Costs; Epitaxial growth; Lithography; MOSFETs; Numerical models; Parasitic capacitance; Radio frequency; RF devices; short channel effects; vertical MOSFETs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference, 2007. CAS 2007. International
Conference_Location :
Sinaia
ISSN :
1545-827X
Print_ISBN :
978-1-4244-0847-4
Type :
conf
DOI :
10.1109/SMICND.2007.4519742
Filename :
4519742
Link To Document :
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