One Dimensional Model for the Duration of the High Breakdown Phase in Deep Depletion Power Devices

Author

Napoli, E.

Author_Institution

Dept. of Electron. & Telecommun. Eng., Univ. of Napoli Federico II, Naples

Volume

2

fYear

2007

fDate

Oct. 15 2007-Sept. 17 2007

Firstpage

403

Lastpage

406

Abstract

The paper presents a one dimensional model of the duration of the increased breakdown voltage phase in deep depletion power devices. The model includes the effect of bulk generation and space charge generation and is verified against numerical simulations of a Si-BOX-Si structure. The model is compared with experimental results regarding the duration of the increased breakdown voltage phase in a power LDMOS in SOI technology. The results show that the interface states are probably the limiting factor for the duration of the increased breakdown voltage phase.

Keywords

interface states; power MOSFET; semiconductor device breakdown; semiconductor device models; silicon-on-insulator; LDMOS; SOI technology; Si; Si-BOX-Si structure; bulk generation effect; deep depletion power devices; high breakdown voltage phase duration; interface states; one dimensional model; space charge generation; Breakdown voltage; Electric breakdown; Electronic mail; Interface states; Numerical simulation; Power engineering and energy; Semiconductor process modeling; Silicon on insulator technology; Space charge; Space technology; Deep Depletion; Lateral power MOS; carrier lifetime; silicon on insulator (SOI) technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference, 2007. CAS 2007. International

Conference_Location

Sinaia

ISSN

1545-827X

Print_ISBN

978-1-4244-0847-4

Type

conf

DOI

10.1109/SMICND.2007.4519744

Filename

4519744