DocumentCode :
3439691
Title :
Electro-Thermal Simulation Environment for Digital ICs
Author :
Moleavin, Viad ; Profirescu, Marcel D.
Author_Institution :
Microchip Dev. Romania, Bucharest
Volume :
2
fYear :
2007
fDate :
Oct. 15 2007-Sept. 17 2007
Firstpage :
493
Lastpage :
496
Abstract :
The paper presents a digital simulation environment at gate level circuit modeling for both functional and thermal behavior. It focuses on the thermal model implementation in Verilog using language extensions.
Keywords :
digital integrated circuits; digital simulation; hardware description languages; integrated circuit modelling; logic design; thermal analysis; Verilog; digital IC; electro-thermal digital simulation; gate level circuit modeling; language extensions; thermal model; Circuit simulation; Digital integrated circuits; Electric resistance; Equations; Hardware design languages; Integrated circuit modeling; Propagation delay; Temperature; Thermal conductivity; Thermal resistance; Verilog; netlist; thermal;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference, 2007. CAS 2007. International
Conference_Location :
Sinaia
ISSN :
1545-827X
Print_ISBN :
978-1-4244-0847-4
Type :
conf
DOI :
10.1109/SMICND.2007.4519768
Filename :
4519768
Link To Document :
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