Title :
The neuron-bipolar junction transistor (v-BJT)-a new device structure for VLSI neural network implementation
Author :
Wu, Chung-Yu ; Yen, Wen-Cheng
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
A new device structure called the neuron-bipolar junction transistor (vBJT) for the compact implementation of VLSI neural network is proposed and analyzed. In the new device structure, the parasitic PNP bipolar junction transistor in the CMOS process is used to implement the neuron whereas the spreading base resistor array is used to realize the synapse weights for various neuron inputs. The multi-emitter structure can also be used to generate the multi-out neuron response. The vBJT neuron cell has the advantages of compact structure and small chip size. The vBJT neuron cell has been successfully applied to the implementation of the analog Hamming neural network. The analog Hamming network can store many sets of examplar patterns with different gray levels. Moreover, the input patterns can be weighted or scaled to eliminate the common offsets and increase the dynamic range and the processing flexibility. With simple and compact structure and high integration capability, the proposed vBJT has a great potential in the VLSI implementation of neural network
Keywords :
CMOS analogue integrated circuits; VLSI; bipolar transistors; neural nets; CMOS process; VLSI neural network; analog Hamming neural network; gray levels; input patterns; multi-emitter structure; multi-out neuron response; neuron-bipolar junction transistor; parasitic PNP bipolar junction transistor; spreading base resistor array; vBJT neuron cell; Buildings; CMOS technology; Equivalent circuits; Laboratories; MOSFETs; Neural networks; Neurons; Resistors; Very large scale integration; Voltage;
Conference_Titel :
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location :
Lisboa
Print_ISBN :
0-7803-5008-1
DOI :
10.1109/ICECS.1998.813986