Title :
Aliasing errors in signature analysis testing of integrated circuits
Author :
Damiani, M. ; Olivo, P. ; Favalli, M. ; Riccó, B.
Author_Institution :
Bologna Univ., Italy
Abstract :
The authors present an accurate model of aliasing probability in signature analysis testing, based on the assumption of independent error bits, that makes it possible to treat the statistical behavior of the register as a Markov process. A proof is given that minimum-hardware registers realizing maximal counting sequences represent optimal choices for aliasing minimization. Exact as well as simplified expressions of aliasing probability have been derived, and a criterion for the identification of maximal aliasing conditions is presented to be used as a tool for the choice of optimal test length
Keywords :
integrated circuit testing; integrated logic circuits; logic testing; Markov process; aliasing errors; aliasing minimization; integrated circuits; maximal counting sequences; model; signature analysis testing; statistical behavior; Analytical models; Circuit faults; Circuit testing; Clocks; Error analysis; Error probability; Feedback circuits; Integrated circuit testing; Numerical simulation; Registers;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on
Conference_Location :
Rye Brook, NY
Print_ISBN :
0-8186-0872-2
DOI :
10.1109/ICCD.1988.25743
