DocumentCode :
3440888
Title :
Interconnect issues post 45nm
Author :
Rossnagel, S.M. ; Wisnieff, R. ; Edelstein, D. ; Kuan, T.S.
Author_Institution :
Res. Div., IBM
fYear :
2005
fDate :
5-5 Dec. 2005
Firstpage :
89
Lastpage :
91
Abstract :
Despite many projections on the inevitable post-PVD evolution of interconnect technology, it remains PVD-based for liner-seed through 45 nm and perhaps farther, with an ALD process change the obvious next step perhaps followed by a switch from Ta to Ru. Cu size effects are not critical to low-level (1times) line RC and the biggest performance opportunity is with the high level fat lines. CA technology, both barrier and fill, does not scale well and may evolve to more interconnect-like materials, potentially unifying two tooling areas
Keywords :
atomic layer deposition; copper; integrated circuit interconnections; integrated circuit metallisation; nanotechnology; ruthenium; tantalum; vapour deposited coatings; 45 nm; ALD process; CA technology; Cu; PVD process; Ru; Ta; interconnect technology; low-level line RC; size effects; Atherosclerosis; Conducting materials; Conductivity; Contact resistance; Integrated circuit interconnections; Plugs; Scattering; Silicides; Switches; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
Type :
conf
DOI :
10.1109/IEDM.2005.1609274
Filename :
1609274
Link To Document :
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