• DocumentCode
    3441558
  • Title

    Perturb and simplify: optimizing circuits with external don´t cares

  • Author

    Shih-Chieh Chang ; Marek-Sadowska, M.

  • Author_Institution
    Synopsys Inc., USA
  • fYear
    1996
  • fDate
    11-14 March 1996
  • Firstpage
    402
  • Lastpage
    406
  • Abstract
    Earlier optimization techniques based on Automatic Test Pattern Generation could not handle external don´t cares. We propose a technique that uses external don´t cares during the ATPG guided logic optimization. This technique transforms external don´t cares into internal don´t cares. Thus, the optimization can utilize the external don´t cares to obtain better results. Additionally, we also discuss some perturbation techniques to improve further results of logic optimizers. Based on a careful analysis of don´t cares migration during incremental changes of an optimized circuit, we have developed a strategy to guide optimization. We have performed experiments on MCNC and ISCAS benchmarks and the results are very encouraging.
  • Keywords
    automatic testing; circuit optimisation; logic testing; perturbation theory; ATPG guided logic optimization; ISCAS; MCNC; automatic test pattern generation; circuit optimization; external don´t cares; perturbation techniques; Automatic test pattern generation; Automatic testing; Benchmark testing; Circuit testing; Logic circuits; Logic testing; Redundancy; Runtime; Sequential circuits; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    European Design and Test Conference, 1996. ED&TC 96. Proceedings
  • Conference_Location
    Paris, France
  • ISSN
    1066-1409
  • Print_ISBN
    0-8186-7424-5
  • Type

    conf

  • DOI
    10.1109/EDTC.1996.494332
  • Filename
    494332