An ASIC engine compiler for digital signal processing

Typical DSP (digital signal processing) applications, such as image processing and high-bandwidth communications, often demand dedicated, high-throughput machines. An ASIC DSP engine compiler has been developed specifically to address these types of problems. It is assumed that the problem can be partitioned into a series of passes through a fixed-function integer arithmetic processing core. Designs are synthesized by the compiler from a dataflow specification plus parameters to specify the desired computational throughput and accuracy. The user can override synthesized attributes and use interactive size and power estimators to make tradeoffs between numerical accuracy and size or power consumption. To illustrate this approach the authors show the design flow and design iteration for an example of a fast Fourier transform