Title :
High performance 35nm L/sub GATE/ CMOS transistors featuring NiSi metal gate (FUSI), uniaxial strained silicon channels and 1.2nm gate oxide
Author :
Ranade, P. ; Ghani, T. ; Kuhn, K. ; Mistry, K. ; Pae, S. ; Shifren, L. ; Stettler, M. ; Tone, K. ; Tyagi, S. ; Bohr, M.
Author_Institution :
Portland Technol. Dev., Intel Corp., Hillsboro, OR
Abstract :
This paper describes the fabrication and performance of uniaxial strained silicon CMOS transistors with NiSi metal gate electrodes and ultra-thin 1.2nm gate oxide. This work offers the first comprehensive evaluation of Si CMOS devices integrating NiSi metal gate (FUSI) process with highly strained Si channels. Performance gains from FUSI gate stack and uniaxial strained Si channels are demonstrated to be fully additive and enable record high drive currents - NMOS lDSAT=1.75mA/mum, PMOS IDSAT=1.06mA/mum (VDD=1.2V, IOFF=100nA/mum). These devices have the best IDSAT vs. IOFF characteristics reported to date in the industry
Keywords :
CMOS integrated circuits; MOSFET; elemental semiconductors; nickel compounds; 1.2 V; 1.2 nm; 35 nm; CMOS transistors; FUSI gate stack channels; FUSI process; NMOS; NiSi; NiSi metal gate electrodes; PMOS; Si CMOS devices; highly strained Si channels; ultra-thin gate oxide; uniaxial strained silicon channels; CMOS technology; Capacitance-voltage characteristics; Electrodes; Germanium silicon alloys; MOS devices; MOSFET circuits; Silicidation; Silicides; Silicon germanium; Tensile strain;
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
DOI :
10.1109/IEDM.2005.1609311
