DocumentCode :
3441739
Title :
High speed analog filtering using feedforward neural network architectures
Author :
Chu, Yiren ; Mehr, Iuri ; Sculley, Terry
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA
Volume :
6
fYear :
1994
fDate :
30 May-2 Jun 1994
Firstpage :
303
Abstract :
The design of analog filters has been a topic of research for many years, yielding a wide variety of techniques for addressing the problem. The work described here approaches this task from a neural network perspective to obtain some of the advantages of neural systems, such as a high tolerance to component imprecision and an ability to train or adapt high order structures. Investigations of linear filter networks utilizing neural-like system topologies are presented, along with accompanying training algorithms and simulation results. Designs of several network components in 2 μm CMOS are described, with simulations indicating their potential for implementing high order, self-programming analog filters at bandwidths above 70 MHz
Keywords :
CMOS analogue integrated circuits; feedforward neural nets; neural chips; programmable filters; 2 micron; 70 MHz; CMOS; feedforward neural networks; high speed analog filters; linear networks; self-programming filters; simulation; training algorithm; Artificial neural networks; Circuits; Computer architecture; Feedforward neural networks; Filtering; Frequency; Network topology; Neural networks; Neurons; Nonlinear filters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location :
London
Print_ISBN :
0-7803-1915-X
Type :
conf
DOI :
10.1109/ISCAS.1994.409586
Filename :
409586
Link To Document :
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