Title :
Building blocks for a temperature-compensated analog VLSI neural network with on-chip learning
Author :
Montalvo, Antonio J. ; Gyurcsik, Ronald S. ; Paulos, John J.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fDate :
30 May-2 Jun 1994
Abstract :
Synapse, neuron, and weight increment circuits for a high density, temperature-compensated analog VLSI neural network are introduced. The synapse circuit, which consumes 4500 μm2 in a 2-μm technology, uses hybrid dynamic and non-volatile weight storage. Dynamic memory allows fast learning while non-volatile memory allows reliable long-term storage and low power dissipation. Measured test results for the synapse are presented. The synapse includes a weight increment circuit that adds offset of only 1 part in 16 bits, thus allowing analog-domain on-chip learning using a weight perturbation algorithm. Simple bias circuits cancel temperature dependent parameters in the synapse-neuron transfer function, allowing reliable operation in the temperature range -55 C to 125 C
Keywords :
VLSI; analogue processing circuits; compensation; learning (artificial intelligence); neural chips; transfer functions; -55 to 125 degC; 2 micron; VLSI; bias circuits; hybrid dynamic storage; long-term storage; neuron circuits; nonvolatile weight storage; on-chip learning; power dissipation; synapse circuits; synapse-neuron transfer function; temperature-compensated analog neural network; weight increment circuit; weight increment circuits; weight perturbation algorithm; Circuits; Network-on-a-chip; Neural networks; Neurons; Nonvolatile memory; Power dissipation; Temperature dependence; Temperature distribution; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location :
London
Print_ISBN :
0-7803-1915-X
DOI :
10.1109/ISCAS.1994.409601
