DocumentCode
3442009
Title
Analogue CMOS VLSI implementation of cellular neural networks with continuously programmable templates
Author
Kinget, Peter ; Steyaert, Michiel
Author_Institution
ESAT-MICAS, Katholieke Univ., Leuven, Heverlee, Belgium
Volume
6
fYear
1994
fDate
30 May-2 Jun 1994
Firstpage
367
Abstract
This paper presents the CMOS realisation of a programmable cellular neural network. An analogue programmable synapse circuit was designed that allows a large dynamic range for the template weights. Tuning circuits transform the digital values specified by the user to the corresponding analogue tuning voltages. A chip containing a 4x4 programmable CNN has been fabricated in a 2.4 μm CMOS process
Keywords
CMOS analogue integrated circuits; VLSI; analogue processing circuits; cellular neural nets; circuit tuning; neural chips; 2.4 micron; analogue CMOS VLSI; cellular neural networks; continuously programmable templates; dynamic range; synapse circuit; tuning circuit; CMOS technology; Capacitors; Cellular neural networks; Integrated circuit interconnections; MOSFETs; Neural networks; Resistors; Turing machines; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location
London
Print_ISBN
0-7803-1915-X
Type
conf
DOI
10.1109/ISCAS.1994.409602
Filename
409602
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