Search of optimal solutions in multi-level neural networks

The output of a multi-level neuron produces a multibit representation. The total network size with multilevel neurons can therefore be significantly reduced from a conventional network with two-level neurons. The reduction in network size benefits VLSI implementation. Due to the nonlinearity associated with a neuron transfer function, multiple local minima exist in the energy function of a multi-level analog-to-digital decision network. The procedure for applying hardware annealing by continuously changing the neuron gain from a low value to a certain high value, to reach the globally optimal solution is described. Several simulation results are also presented. The parallel hardware annealing method is much faster than the simulated annealing method on digital computers