Title :
Hardware check of arithmetic devices with abridged execution of operations
Author :
Drozd, A. ; Lobachov, M. ; Hassonah, W.
Author_Institution :
Dept. of Comput., Odessa State Polytech. Univ., Ukraine
Abstract :
The authors propose the checking by a module method of the multiplier in a high-performance floating-point arithmetic device. This process of checking defines the common approach to the modular checking of arithmetic devices with abridged execution of operations. The process consists of a checking code of the rounded result formed by the checking codes of the operands and its parts
Keywords :
digital arithmetic; error detection codes; floating point arithmetic; logic testing; multiplying circuits; abridged execution of operations; checking code; floating-point arithmetic device; hardware check; modular checking; module method; multiplier; Circuits; Floating-point arithmetic; Hardware; Indexing; Production; Testing; Zinc;
Conference_Titel :
European Design and Test Conference, 1996. ED&TC 96. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-7424-5
DOI :
10.1109/EDTC.1996.494375
