Analog CMOS implementation of neural network for adaptive signal processing

Author

Oh, Hwa-Joon ; Salam, Fathi M A

Author_Institution

Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA

Volume

6

fYear

1994

fDate

30 May-2 Jun 1994

Firstpage

503

Abstract

A modular analog CMOS artificial neural network is designed and fabricated for adaptive signal processing. A modified Gilbert multiplier is used as a linear combination of several input signals. Modified back-propagation continuous-time learning rules are used as an adaptive algorithm. The adaptive algorithm adjusts the weights in real time by on-chip learning circuits. Hardware learning circuits are simulated using PSPICE, then layout design of a modular chip is fabricated via the MOSIS services. We report on the chip test results which demonstrate the successful operation of the chip in 3 adaptive filtering scenarios

Keywords

CMOS analogue integrated circuits; SPICE; adaptive filters; adaptive signal processing; analogue processing circuits; backpropagation; circuit analysis computing; feedforward neural nets; integrated circuit layout; neural chips; MOSIS services; PSPICE; adaptive filtering scenarios; adaptive signal processing; backpropagation continuous-time learning rules; hardware learning circuit simulation; layout design; linear input signal combination; modified Gilbert multiplier; modular analog CMOS artificial neural network; modular chip; modular feedforward ANNs; on-chip learning circuits; real time weight adjustment; Adaptive algorithm; Adaptive signal processing; Adaptive systems; Artificial neural networks; CMOS process; Circuit simulation; Hardware; Neural networks; SPICE; Signal design;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on

Conference_Location

London

Print_ISBN

0-7803-1915-X

Type

conf

DOI

10.1109/ISCAS.1994.409636

Filename

409636