Title :
Design of high performance PFETs with strained si channel and laser anneal
Author :
Luo, Z. ; Chong, Y.F. ; Kim, J. ; Rovedo, N. ; Greene, B. ; Panda, S. ; Sato, T. ; Holt, J. ; Chidambarrao, D. ; Li, J. ; Davis, R. ; Madan, A. ; Turansky, A. ; Gluschenkov, O. ; Lindsay, R. ; Ajmera, A. ; Lee, J. ; Mishra, S. ; Amos, R. ; Schepis, D. ; N
Author_Institution :
Syst. & Technol. Group, IBM Semicond. Res. & Dev. Center, Hopewell Junction, NY
Abstract :
The effects of the integration of two major PFET performance enhancers, embedded SiGe (e-SiGe) junctions and compressively stressed nitride liner (CSL) have been examined systematically. The additive effects of e-SiGe and CSL have been demonstrated, enabling high performance PFET (drive current of 640 muA/mum at 50 nA/mum off state current at 1V) with only modest Ge incorporation (~20 at. %) in S/D. And for the first time, we have demonstrated that by integrating e-SiGe and laser anneal (LA), defect-free e-SiGe can be fabricated, and the benefits of both techniques can be retained. Our study of geometric effects also reveals that e-SiGe can be extended to 45 nm technology and beyond
Keywords :
Ge-Si alloys; field effect transistors; laser beam annealing; nitridation; semiconductor materials; 1 V; CSL; PFET; SiGe; compressively stressed nitride liner; laser anneal; performance enhancer; strained silicon channel; Annealing; CMOS technology; Capacitive sensors; Electronic components; Epitaxial growth; Etching; Optical design; Research and development; Semiconductor device manufacture; Spectroscopy;
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
DOI :
10.1109/IEDM.2005.1609388
