A self-reconfiguration scheme for fault-tolerant VLSI processor arrays

An interconnection network capable of spontaneously reconfiguring a VLSI processor array upon detection of faulty processors is presented. Although the reconfiguration process is global in nature, the network control circuitry is localized around each processor and is therefore completely modular. In effect, the switches and control circuitry are completely local to each processing element (PE) even though the reconfiguration algorithm the network performs is general in nature. Further, as the control circuitry around each PE is fixed and no global control circuitry of any kind is required, the area overhead due to the network circuitry grows linearly with both the array size and the total number of spares