DocumentCode
3443441
Title
A distributed barrier synchronization solution in hardware for 2D-mesh multicomputers
Author
Delgado, Martha Ximena Torres ; Kofuji, Sergio Takeo
Author_Institution
Lab. of Integrated Syst.-Polytech. Sch., Sao Paulo Univ., Brazil
fYear
1996
fDate
19-22 Dec 1996
Firstpage
368
Lastpage
373
Abstract
This paper shows a new hardware solution for implementing barrier synchronization in 2D-mesh multicomputers. The synchronization process is executed in n-1 sequential stages where n is the largest dimension of the nxm mesh configuration. Each stage establishes simultaneous communication with maximum 4 nodes through additional wired-AND wires, allowing the propagation of information among the adjacent cells every time. This solution presents the following characteristics: (a) fast barrier synchronization, (b) allows that any subset of nodes participate in each barrier whenever sequential barriers are considered, and (c) allows simultaneous execution of multiple barriers whenever subsets of nodes belonging to non-overlapping rectangles are considered. The control logic and number of wired-AND wires are the same per node. Therefore, the system size is easily increased, being only limited by the expansion capacity of the 2D-mesh network. Analytical results indicate that the new approach should perform almost as well as efficient barrier synchronizers
Keywords
multiprocessor interconnection networks; parallel algorithms; synchronisation; 2D-mesh multicomputers; control logic; distributed barrier synchronization solution; hardware solution; wired-AND wires; Costs; Data structures; Delay; Hardware; Laboratories; Logic; Mechanical factors; Parallel algorithms; Performance analysis; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing, 1996. Proceedings. 3rd International Conference on
Conference_Location
Trivandrum
Print_ISBN
0-8186-7557-8
Type
conf
DOI
10.1109/HIPC.1996.565849
Filename
565849
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